1. Field of the Invention
The present invention relates to a method of creating a mathematical model which is employed in the determination of at least one work location in a multi-layered laminated circuit panel. More particularly, the invention is directed to the creation of a mathematical model for modifying drill data which takes into consideration translational and rotational compensations caused by the encountered stretching or shrinking of the multi-layered panel subsequent to pressing or due to thermally processing, whereby the mathematical model may be utilized to modify drill data in order to accurately predict hole or via locations.
In the implementation of pressing and/or thermal processes employed in producing multi-layered panels for semiconductor packages, such panels frequently will stretch or shrink in non-uniformly translational and rotational aspects, and consequently may be the source of erroneous locations in the formation of holes or vias which are drilled into the panels, thereby rendering the panels unsuitable for installation in electronic packages, and subjecting the processes to economic losses for the manufactures.
At times, such positional errors in the formation of fiducial holes or vias and slots by means of laser drilling are encountered when utilizing the same machine, such as a drilling apparatus, with the same drilling location set up. Currently, the only translational compensation which is incorporated into the drilling data for drill machines employed in forming holes or vias in panels, such as those for electronic packages or printed circuits, fail to provide any integrated vision systems. This renders any corrections for distortions encountered in the multi-layered panels to be difficult to attain so as to be able to compensate precisely for distortional stretching or shrinkage conditions which are encountered during the pressing or thermal processing of the panels prior to effectuating their drilling.
2. Discussion of the Prior Art
Although numerous publications are presently available, which direct themselves to providing for various types of error compensations, such through the utilization of algorithms and various mathematical programs adapted to compensate for misalignments and distortions in multi-layered printed circuit boards or panels in order to optimize hole or via drill positions, none of these have been able to adequately precisely overcome the distortion problems which are encountered, inasmuch as there is no accounting for encountered dimensional stability problems or compensation factor calculations in both translational and rotational position error considerations.
Whitcomb et al. U.S. Pat. No. 6,030,154 uses a search algorithm to find better holes locations; in fact, tries to find new location in the local of the existing one. However, while establishing change increment, it will vary only to scale shrinkage/growth about the panel center on either x- or y-direction (not both) along with other parameters: i.e. x and y translation, and rotation about the panel center. That means, the patent will establish a change increment in a matrix combination of either (Tx, Ty, Sx, rotation) or (Tx, Ty, Sy, rotation).
To the contrary, the present invention employs an exact mathematical model to predict the better locations for the holes. The model includes translation and scaling (on both x- and y-directions) and rotational compensations, however, the term “rotation” in applicant's disclosure means the change of the angle between two parallel lines after completion of the pressing processes.
Since U.S. Pat. No. 6,030,154 uses a numerical search algorithm, the obtained results cannot be used to modify the data file before importing into a drill machine, but must be manually input by the operators to the drill machine's controllers.
In the present disclosure, the resulting compensation factors can be very easily used to modify the data file before importing into the drill machine, for instance, such as to write a simple program that can modify every single point's coordinates using the exact mathematical model.
Forehand et al U.S. Pat. No. 5,710,063 discloses a method to prepare fiducials on a panel, whereby an optically-aligned drill, such as Dynamotion Drill with “Smart Drill” option, is positioned over the panel and adapted to precisely align the bit of the drill with these fiducials. This is not relevant to the present disclosure.
Kosmowski et al. U.S. Pat. No. 5,529,441 differs from the present invention in that different mathematical modes are used to predict hole location; in effect, the patent uses the least squares best fit, while a simple mathematical model is used in my disclosure. In the patent, each panel is being analyzed to determine the compensation factors and drilled with modified data on the same apparatus. Statistical data gathering from a batch of panels is suggested to be used for improving other process registrations, such as lamination registration. To the contrary, in the present invention a batch of panels is being analyzed to determine the compensation factors. Drill data is then modified and fed into drill machines that do not have an integrated vision system to drill the panels.
Amman et al. U.S. Pat. No. 5,206,820 discloses a method adapted to analyze panel misregistration in a printed circuit board. It requires a mean to align the center of the panel with the center of the master pattern etched on a glass reference. Then the detected corner offsets of the panel are measured and transformed into eight primary parameters, which are directional shifts Δx and Δy, rotation with respect to center of the panel θ, directional distortions α and β, shear γ, and directional expansions εx and εy. In fact, these eight parameters are the coefficient or a combination of the coefficients of the models:U=ao+a1x+a2y+a3xy, V=bo+b1x+b2y+b3yx. where U and V are the horizontal and vertical displacements of the detected corners. A set of these eight primary parameters collected from a sampling of panels selected from a manufacturing lot is then used to calculate advanced parameters. Such advanced parameters including the average, the standard deviation, and the range of the primary parameters are claimed as critical means to analyze panel misregistration.
Thus, this patent uses different mathematical models to understand the probable causes of panel misregistration, whereas the method of the present invention to modify data due to the shrinkage/stretch of the panels.
Araki U.S. Pat. No. 5,223,536 pertains to a method of perforating a printed circuit board with a pair of perforating devices. The distance between the two perforating devices is adjusted to be equal to the actual distance of two patterns on the panel, which is detected by an image processing device. Then the two perforating devices perforate the printed circuit board at the same time. Thus, this patent is completely irrelevant to the present inventive concept.
Alzmann et al. U.S. Pat. No. 4,829,375 is directed to a method and apparatus for automatically punching tooling slots or holes into a panel. The apparatus employs a vision system to locate two fiducial marks on the panel, wherein the vision system defines references for the fiducial targets and preset reference. A positioning system moves the panel to position the fiducial marks on the panel directly in relationship to the preset references. After the positioning operation, tooling slots or holes are punched on the panel. Thus, this patent has nothing in common with the present invention.
Zachman et al. U.S. Pat. No. 5,111,406 discloses a method that engages a fixture on a multi-layered panel. The fixture is carefully prepared with fixture holes that correspond to the locations of the fiducial pads on layers of the panels. The patented apparatus uses x-rays to capture at the same time, coordinates of the measured locations of the fiducial pads on a multi-layered panel and coordinates of the ideal locations of the fixture holes. These coordinates from a sample of panels are then analyzed by a “Best Fit algorithm”.
The offsets are fitted to produce a single offset value that may be sent to a drilling machine to determine a position for drilled holes in the panel. Thus, unlike the present invention, this patent mainly discusses the method and apparatus used to determine the fitted offsets that are added to each of the ideal drill coordinates. In addition, it is not known as to how the “Best Fit algorithm” actually works, and in any case ha nothing in common with the present invention.
Hale et al. U.S. Pat. No. 4,123,695 is directed to a method using a vision system to automatically position the drill bit to a desired location; therefore, is completely irreverent to the present invention.
Wilent et al U.S. Pat. No. 4,790,694 discloses a method and apparatus intended to determine locations of three fiducial marks on a multi-layered printed circuit board prior to drilling. The patent employs the best least square fit to minimize any misaligning between four target areas on the board and the precisely located target holes on a template. After optimization, three fiducial marks are punched along one edge of the board. These three fiducial marks are then used to position the board in a drilling apparatus.
Japanese Patent JP 3136708 discloses a method of employing an image pickup device to obtain the coordinates of register marks at several positions in a work piece, then boring process will be adapted to geometrical distortions of the workpiece.
Finally, European Patent EPO 669792 is primarily a European version of U.S. Pat. No. 5,529,441 to Kosmowski et al., and the comments directed thereto are equally applicable to the European patent.